
Low
Design Effort
The ZeroG Wi-Fi I/O is a technology that is tightly integrated with
major
microcontroller providers. It includes
software and hardware to simplify the design process in wireless
networking. Adding Wi-Fi using ZeroG's Wi-Fi I/O requires minimal
networking knowledge. It allows designers to take the module out-of-the
box and bring up a
Wi-Fi-connected prototype in as little as a few hours.
Tight Integration with major microcontroller providers ensures that a
customer's investment in development tools, IP and code base is
preserved, reducing design time. The first dev kit we've created works
with Microchip MCUs:
- Software and hardware incorporate the Microchip TCP/IP
networking stack
- Compatible with 8/16/32-bit product families PIC18®, PIC24®,
PIC32® and dsPIC
-
Development kits consist of Microchip development tools and
software, ZeroG drivers and example application code
Production modules of ZG2100M will be shipped with
certification from FCC, Japan and Canadian regulatory bodies across
a variety of antenna configurations. Pre-scan data that is required for
ETSI certification will be available.
Easy-Fi® software suite contains APIs support
infrastructure and adhoc modes, along with shared APIs for
configuration and security settings ZeroG Easy-Fi® software
driver works with nearly any OS and nearly any microcontroller.
Low
Power Consumption
The ZeroG Wi-Fi I/O contains dedicated on-chip power management
hardware and software to achieve long battery life. The technology
allows designers to reduce power consumption both on the ZG2100 and on
the host microcontroller in order to meet the needs of a wide array of
applications.
- Power-saving modes are optimized for long battery life. Battery
life lasts as long as 10 years for "once-a-day-wake-up"
- Wireless architecture optimized for applications with low duty
cycles and low bandwidth.
- The chip automatically goes on standby in between receive and
transmit
sessions, along with a "fast wake-up" call at the receipt of packet.
- The Wi-Fi I/O automatically reduces power without
intervention from host MCU
No-host polling allows the host MCU to shut down while the chip
remains active
- The chip wakes up the host MCU at the receipt of data
packets
- In many applications, the Wi-Fi I/O does not require the
addition of external memory or an operating system, reducing overall
system power consumption.
Low
System Requirements
The combination of hardware and software from ZeroG is built from the
ground up to allow embedded designers to add Wi-Fi with minimal system
resources. The Wi-Fi I/O technology is architected for embedded systems
and requires minimal system resources for memory footprint and processor
cycles on the host microcontroller.
- On-chip hardware security accelerators for WEP/WPA/WPA2 reduce
memory footprint and offloads host processor cycles
- On-chip MAC layer reduces cycles done by host processor
- No external memory required to run the Wi-Fi I/O. The host RAM
requirement is as little as 2.8kB
- The Easy-Fi® suite includes a very small and easily
ported driver with a footprint that uses as little as a few hundred
bytes of RAM from a host microcontroller, and less than 10kB of ROM.
- The driver includes a comprehensive suite of commands that allow
it to easily run in small or no OS systems.
Low
System Cost
ZeroG has created an embedded architecture where designers can
minimize external components and I/Os used for an application, and in
turn, reduce total system cost. Furthermore, system designers have the
ability to reuse design architecture, reducing the cost of engineering
efforts to bring a product to market.
- Supports low-cost 8-bit microcontrollers. ZeroG also support
systems that use 16- or 32-bit MCUs.
- Add Wi-Fi without adding an OS and support an already existing
OS
- No additional memory to integrate Wi-Fi
- Production modules will be shipped with
certification from FCC, Japan and Canadian regulatory bodies
across a variety of antenna configurations. Pre-scan data that is
required for
ETSI certification will also be available.
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